A new architecture for fast modular multiplication
Yeong-Jiunn Juang, Erl‐Huei Lu, Jau‐Yien Lee, Chin‐Hsing Chen · International Symposium on VLSI Technology, Systems, and Applications · 2003
An algorithm for computing AB mod N is developed, where N can be any positive integer. Since a carry-save adder can be used to implement the algorithm, a VLSI (very-large-scale integration) multiplier with area O(n) for multiplying n-bit integers is very fast. It is shown that n-bit AB mod N operation with 2/sup n-1/>