Computer-aided logic synthesis based on a new multi-level hardware design language---lalsd ii
ChiLai Huang · 1982
In this dissertation a new multi-level hardware design language (HDL), LALSD II (Language for Automated Logic and System Design), is presented. LALSD II is a hierarchically structured HDL with high-level constructs to allow multi-level descriptions. The user-definable modular constructs allow the user to define hardware modules which bear a close resemblance to actual components. The language treates a synchronous sytem just as a special case of an asynchronous system. Its timing facility can accurately describe the digital system operations without having to use a gate level implementation. Its multi-level description capability will cover the broad spectrum of design levels from the architectural level, instruction level, register-transfer level to the logic design level. In the second part, a new logic synthesis method is given. Using a hardware design language, a system to be designed can be described in its behavior description rather than separated structure and control part descriptions, and integrated circuit modules and their interconnections are automated generated by the new method. The new method allows mixed-level synthesis using modular functional primitives rather than logic gates. Different configurations are generated to compare the design compromises using key components designated by the user. The behavior level redundancy is eliminated and inherent parallelism is exploited to generate a reasonably good design. Using this approach the design effort is greatly reduced without sacrificing the quality of the designed system. Finally, the step-by-step algorithm for the LALSD II-based logic synthesis is developed and implemented in PL/I for Itel AS/6 (equivalent to IBM 370/158). Several examples have been tried by the synthesizer to show the synthesis features. A complete automated logic design of the DEC pdp-8 computer is presented.