The BEDROC high level synthesis system
Miriam E. Leeser, Mark D. Aagaard, Mark H. Linderman, R. K. Chapman, R. Johnson, S.R. Meier · 2002
BEDROC is a digital hardware synthesis system that automatically translates a behavioral description written in a hardware description language to field programmable gate arrays. The authors have used BEDROC to synthesize several circuits from the high level synthesis workshop benchmarks. BEDROC is unusual in its aim to incorporate formal methods into the hardware synthesis process. By verifying the algorithms used for synthesis instead of the synthesized designs, the designer gets many of the benefits of formal methods without having to learn new techniques.>