Sparse matrix vector product on distributed memory MIMD architectures
Rod Cook, Jan Sadecki · PPSC · 1993
This paper describe the implementation of sparse symmetric and nonsymmetric matrix vector product on distributed memory MIMD machines. The choice of storage scheme for sparse symmetric matrices are discussed with relevance to their use in implementing a sparse matrix vector product. A parallel implementation is described in which only the minimum amount of data is transmitted between the processors. Some results obtained on a Supernode using up to 49 T800 Transputers are discussed.