Design of an Efficient TDL Filter for Wireless Communications and its Performance Evaluation
Seung Wan Seo · 1999
Since the direct-form filter sums several bits at on cycle, it should operate at low speed when the number of taps is increased. To increase the operating grequency, the transpose-form filter using a pipeline scheme has been proposed. However, the transpose-form filter requires a large number of gates. this paper proposes a tapped delay line (TDL) filter considering time delay and and hardware size and evoluates performance. Although the proposed filter using efficient pipeline schemes requires larger number of gates compared with the direct-form filter, it increase the clock speed compared with direct-form filter and requires less number of gate compared with transpose-form filter. Appying the proposed TDL filter of 128 taps for the CDMA standard, IS-95, can reduce the gate count by the more then 30% compared with the transpose-form filter without sacrificing the clock speed. In the addition, although the proposed TDL filter increases the gate count about direct-form filter, that can increase the clock speed about 200% compared with the direct-form filter