Multiple Microcomputer Control Algorithm.
Robert O. Pettus, Bonnell,Ronald D, Michael N. Huhns, Stephens,Larry M, Wierzba,Gregory M · Defense Technical Information Center (DTIC) · 1979
The design, analysis and performance evaluation of the architecture of a mutiprocessor is presented. The architecture is a hierarchically structured, functionally distributed, multiple microcomputer system. Its operating system is a multi-level structure implemented in an optimal combination of hardware, firmware, and software. This architecture is suited to any application, such as process control or real-time system simulation, in which the basic computational tasks do not change in time. Control functions are distributed among the microcomputer; however, the scheduling and execution of these tasks is governed at each microcomputer level by a local, real-time operating system. This local operating system is implemented primarily in firmware to minimize overhead. However, the control structure is designed to be independent of implementation so that a variety of microcomputers can be utilized together. Moreover, it is possible to add to each local processor an additional subprocessor which implements the operating system.