Basic Properties and Limits of Integrated Arrays of Dissipative Circuit and Logic Elements
Robert O. Grondin · 1989
Abstract : The efforts are divided into the following categories: (a) the effect of scaling on the performance of integrated device arrays; (b) the development of pipelined content addressable memory; (c) the development of integratable fuzzy neurons; (d) the mapping of graph searches into systolic arrays; and (e) the study of ferroelectric capacitors for application in novel integrated circuits. (rh)