A VLSI chip set for burst and fast ATM switching
J. Fried · 2003
An architecture is presented for a family of small switches using three custom chip types. It is shown how the use of a few specialized very large-scale integration (VLSI) circuits in a shared-memory context can speed operations on shared data structures by a factor of 20 or more. One of these is a locking circuit based on a fast content-addressable memory. Two others are small-area synchronous first in, first out (FIFO) circuits and counters that work within a read-modify-write memory cycle. These circuits are integrated into a memory controller chip. It is also shown how the provision of a few extra features in the programming model of a VLSI microprocessor can allow paradigms common to the development of parallel algorithms to be used in the distributed domain. A design for a VLSI microprocessor called a switching processor provides enough power to handle proposed fast switching techniques such as burst switching in real time. In addition, it is shown how VLSI circuit techniques can be used to reduce the area and power needed to interface these switching processors to real-world telephones and data terminals; these circuits have been incorporated in a single-chip port concentrator with over 50 K transistors.>