A processor network without interconnection path
D. Stefan, G. Stefan · 2003
In the current silicon technologies the wire connections become more and more important. They will waste time, energy and maybe area more than the gates. Beyond the technological solutions for this problem, architectural solutions are welcome. This paper discusses a solution which completely avoids the interconnections in a 4-processor network. More, the four processors share many structural resources, thus minimizing the size of the entire structure. The pipeline penalties are completely avoided in the proposed structure. The machine we describe is an environment for interleaved multi-threaded executions.