An embedded PowerPC/sup TM/ SOC for test and measurement applications
B. Blaner, D. Czenkusch, Robert Devins, S. Stever · 2002
This paper presents an embedded PowerPC system-on-a-chip for test and measurement embedded control applications. The SOC provides a leap in performance and interconnection capability over previous embedded controllers in the application space. The chip is built around a 200 MHz IBM PowerPC 405/sup TM/ CPU and IBM CoreConnectTM buses, with memory controllers for PC100 SDRAM, SRAM, flash, and ROM. A high degree of interconnection flexibility is achieved by integrating interfaces to a wide variety of communications media including 400 Mbps IEEE 1394, Ethernet 101100Mbps, RS/232, IrDA, I/sup 2/C, SCP, and others. The challenges of implementing such a large SOC design are discussed, with a detailed consideration of design verification methodology.