Quad Asynchronous Communication Element (ACE) with FIFO
S.U. Mahesh, M. Long, L. Simmons · 2005
The Universal asynchronous receiverltransmitter serves as serial inputloutput interface in microcomputer or microprocessor based systems. The Quad ACE (UART) is designed to maximize multiple serial port-single CPU intzluction, with mimum speed and reliability and a minimum of space. It performs serial-to-parallel conversion on data characters received from peripheral devices or modems, and parallel-to-serial conversion on data characters transmitted by the CPU. The complere status of each channel of the UART can be read at any time during functional operation by the CPU. The information obtainable includes the type and condition of the tranger operations being perfotmed and error conditions. A programmable baud rate generator is included that can divide the timing reference clock input by a divisor between 1 and (2A16 - 1).