Conduction error reducing at power FET's linear model extraction
A. A. Kapralova, L. V. Manchenko, V. A. Pchelin · International Crimean Conference Microwave and Telecommunication Technology · 2009
The simple method of error reduction of contacting in the process of regenerating of analog circuits of power FETs is presented. The technique is based on the measuring operation of the same transistor in 50 Ohm line and than in the matching circuit with the specified impedance.