Chip-rate adaptive two-stage receiver for scrambled multirate CDMA downlink
Adam R. Margetts, Philip Schniter · 2004
In this paper we propose an adaptive two-stage receiver for a scrambled multirate DS-CDMA downlink transmitted via synchronous orthogonal short codes and subjected to time- and frequency-selective multipath fading. The first stage of our two-stage receiver (P. Schniter et al., Nov. 2002) consists of adaptive FIR equalization generating tentative hard decisions. The decisions are fed-forward to the second stage for further processing via adaptive decision-feedforward equalization (DFFE) or adaptive inter-chip interference cancellation (ICIC). (The ICIC receiver was introduced in (A. Margetts et al., Oct. 2003)). Here we detail the adaptive DFFE and ICIC structures, which are based on low-complexity decision-directed LMS. For further complexity reduction, the ICIC performs maximal ratio combining of only the ICIC branches corresponding to the largest channel taps. Since ICIC removes both pre- and post-cursor interference, it outperforms the DFFE.