High performance low power video compression techniques for future digital video solution
Weetit Wanalertlak, Chee Lee, Wen-Tsong Shiue · 2003
This paper presents a comprehensive solution for future digital video techniques with the constraints of timing, memory storage and power dissipation such that the quality of video and/or image is still maintained. Our contributions in this paper include: (i) software codec techniques such as fixed-point YUV components, factorized DCT, various DCT block sizes based on the quad tree data structure algorithm for the propose of reducing the complexity of the computations, increasing compression ratio, improving the performance, and (ii) hardware codec techniques such as compiler technique, software synthesis, and dynamic voltage scaling incorporated in the hardware design procedures. Our benchmark results show that for an intra-frame with a 352/spl times/288 image size, 3157 frames can be processed in 22.23 seconds - almost 6/spl times/ faster than the commercial MPEG2 in the Linux GCC environment in the Pentium III 866 MHz laptops. Furthermore, the power consumption is reduced by 23% due to the techniques of dynamic voltage scaling incorporated in the hardware design.