A new processor architecture for digital signal transport systems
Minoru Inamori, K. Ishii, Akihiro Tsutsui, Kazuhiro Shirakawa, H. Nakada, T. Miyazaki · 1997
This paper proposes a new processor architecture for manipulating protocols in digital signal transport systems. To realize flexible and high-performance digital signal transport systems, the architecture has unique application-specific hardware with a core CPU. It is derived from an analysis of functions in real systems. A computer simulation confirms the efficiency of the architecture.