Migration from FPGA to gate array
Zhao Li · 2002
Increases in performance and logic capacity are allowing FPGA devices to be used by many engineers for fast prototyping. However, at annual volume of more than tens of thousands, the lower unit cost of mask gate array entices the user to consider converting the design. But it is not easy migration, given such problems as timing incompatibility and testing. We will list the issues which must be considered while converting FPGA to mask gate array. On the other hand, to make the design conversion easy a Migration Tools-Set, MITS, is designed and is under development. It does not solve all the problems involved in converting an FPGA design to a gate-array design. But it will give much help, and do much tedious calculation for the user.