A New Organization for a Perceptron-Based Branch Predictor and Its FPGA Implementation
Oswaldo Cadenas, Graham M. Megson, D. Jones · 2005
An unaltered rearrangement of the original computation of a neural based predictor at the algorithmic level is introduced as a new organization. Its FPGA implementation generates circuits that are 1.7 faster than a direct implementation of the original algorithm. This faster clock rate allows to implement predictors with longer history lengths using the nearly the same hardware budget.