Building extensible routers using network processors: Research Articles
Nadia Shalaby, Andy C. Bavier, Yitzchak M. Gottlieb, Scott Karlin, Larry Peterson, Xiaohu Qie, Tammo Spalink, Mike Wawrzoniak · Software Practice and Experience · 2005
This paper describes our effort to build extensible routers using a combination of general-purpose and network processors. We emphasize five overriding challenges that dictate our design decisions: (1) optimal resource allocation; (2) efficient but flexible scheduling of the CPU; (3) maintaining overall router robustness; (4) maximizing router performance; and (5) providing sufficient extensibility to enable the injection of new functionality into the router. We adopt a hierarchical architecture, in which packet flows traverse a range of processingsforwarding paths, thereby partitioning hardware and software in concert. This paper both presents the architecture, and describes our experiences implementing the architecture and addressing the five design challenges in a prototype built from Intel IXP 1200 and a Pentium. Copyright © 2005 John Wiley & Sons, Ltd.