The Metaflow Lightning chipset
B. D. Lightner, G. Hill · 2002
The Lightning SPARC superscalar microprocessor chipset is the first processor to implement the Metaflow architecture. This architecture exploits instruction-level parallelism present in conventional sequential programs by hardware means, without relying on sophisticated optimizing compilers. The Lightning processor is capable of executing instructions out of order and speculatively. Lighting is based on an integrated instruction-shelving structure called the DRIS (deferred-scheduling, register-renaming instruction shelf). All instructions are placed in the DRIS as they are fetched. A dataflow based instruction scheduler selects instructions for execution from the DRIS after all needed operands have been computed. Instruction results are shelved in the DRIS along with instructions. Instructions are removed from the DRIS, and their results are written to permanent storage, in the order in which they were fetched. Instructions following conditional branches are executed speculatively, based on a predicted direction; the effects of a mispredicted branch are quickly repaired.>