Multiprocessor sparse SVD algorithms and applications
Michael W. Berry · 1991
this memory is statically allocated, whereas on the Alliant FX/80 it is dynamically allocated as needed. On the Cray-2S/4128, the vector z would be both retrieved from and written to core memory. However, on the Alliant FX/80, z may be fetched and held in the 512 kilobyte cache. Since memory accesses from the cache (fast local memory) can almost twice as fast as those from the larger globally-shared memory, we achieve an overall higher computational rate for multiplication by A