Power and delay optimization for network on chip
Mohsen Nickray, Masoud Dehyadegari, Ali Afzali‐Kusha · 2006
In this paper, we introduce an algorithm based on genetic algorithm for optimizing power consumption and delay of applications which are mapped on fat tree topology. We develop a NOC communication power model to estimate tire power consumption in communication. Our algorithm consists of Vertex mapping to PEs, Node mapping and Delay optimization. These steps map task graphs into a fat-tree NOC how had been minimum power consumption. Experimental results show that we could achieve the efficiency of 94%.