A study of hardware design and overhead in Built-in-Self-Testable UART
Mohd Yamani Idna Idris, Mashkuri Yaacob, Zaidi Razak · 2004
A Built-in-Self Testable UART has the main objective of firstly satisfying specified testability requirements and secondly to generate the lowest-cost with the highest performance implementation. The development of the design will be using VHISC Hardware Description Language (VHDL). Following that, the design will be simulated and synthesized using Xilinx Foundation Series Software.