A hardware realization of the generalized euclidean algorithm for multisequence shift-register synthesis
Paul Vincent Kraft · 1992
. . . . . . . . . . . . . . . . . . . . . . 1 Chapter I Introduction . . . . . . . . . . . . . . . 2 Chapter II Shift-Register Synthesis Algorithm • • •• 7 Chapter III Design Overview • . • • • • . • . . • .• 12 Chapter IV Design Implementation 13 Chapter V Results and Conclusions • • • • . • . . •• 20 Appendix A Control Program Listing . . . . . . . . . 21 Appendix B Lsim Module Listings • • . • • • • • • •• 31 Appendix C Simulation Output . . . . . . . . . . . . 36