Minimization of the number of PAL macrocells for Moore FSM
А. А. Баркалов, Larysa Titarenko, Sławomir Chmielewski · International Conference on Experience of Designing and Applications of CAD Systems in Microelectronics · 2009
The method for decrease of the number of PAL macrocells in the circuit of Moore FSM is proposed. This method is based on the implementation of free outputs of embedded memory blocks to represent the code of the class of pseudo equivalent states. The proposed approach allows minimize the hardware without decreasing digital system performance. An example of application of the proposed method is given.