A high throughput systolic design for QR algorithm
J.-J. Wang, Chein-Wei Jen · 1993 IEEE International Symposium on Circuits and Systems · 2002
Based on the Givens rotation, a high throughput systolic array for the QR algorithm is proposed. Two techniques are adopted to increase the throughput rate in this design. First, the reformulation of the Givens rotation is presented to release the recursive relation and so increase the parallelism and reduce the computational complexity. Second, parallel processing and two-level pipelined techniques can be used to increase the throughput rate and reduce the latency. In the new design, the throughput rate is increased to 1/T/sub MA/, where T/sub MA/ is the computation time of multiplication-addition. This throughput rate is faster than that in all previous designs. The latency is also superior to the previous designs.>