A 3.3 V 16 Mb nonvolatile virtual DRAM using a NAND flash memory technology
Tae-Sung Jung, Do-Chan Choi, Sung-Hee Cho, Myong-Jae Kim, Seung-Keun Lee, Byung-Soon Choi, Jin-Sun Yum, San-Hong Kim, Donggi Augustine Lee, Jong-Chang Son, Myung-Sik Yong, Heung-Kwun Oh, Sung-Bu Jun, Woung-Moo Lee, Ejaz Ul Haq, Kang-Deog Suh, Syed Ali, Hyung‐Kyu Lim · 2002
A 3.3V 16Mb nonvolatile memory has read and write operations fully DRAM-compatible except a longer RAS precharge time after write. Most systems with high-performance processors use a shadow nonvolatile memory uploaded to a fast DRAM to obtain zero wait-state performance. The introduced nonvolatile virtual DRAM (NVDRAM) eliminates the need for this redundancy, achieving high performance while reducing power consumption. Fast random access time (tRAC) with a NAND flash memory cell is achieved by using a folded bit-line architecture, and DRAM comparable column address access time (tkA) is achieved by sensing and latching 4k cells simultaneously.