Multiswitch Hardware Configuration
Douglas E. Comer, Victor T. Norman · Purdue e-Pubs (Purdue University System) · 1992
The Multiswitch project is exploring network architectures that use high-speed, multiprocessor packet switches to forward traffic among connected networks.Our goal is to fiod an architecture that can scale to handle the traffic from thousands of communicating machines.This paper describes a particular hardware configuration used in a prototype Multiswitch network.The configuration uses multiple INMOS transputer processors arranged in a tightly-coupled group to form a packet switch.The packet switch topology provides low internal switching delay, high path redundancy, and high reliability.A set of one or more Multiswitch packet switches can be interconnected to form a network with arbitrary topology.We are particularly interested in a topology that uses a ring of packet switches with a special-purpose central interconnect.The topology offers high throughput and low congestion.Our project views a Multiswitch network as a geographically distributed router, capable of interconnecting hundreds of networks (usually local-area networks).The technology will be flexible enough to serve as a local-area, metropolitan-area, or wide-area network.