Mixed-signal low-noise adder with constant power for side-channel attack immunity
Ashley Novak, Mitra Mirhassani · 2015
This paper explores a mixed-signal method for designing a crypto processor component, the adder, which allows it to produce minimal side channel information, rendering it less vulnerable in terms of hardware. The adder is implemented in TSMC CMOS 90nm technology. The results show that it is possible to maintain a competitively low power consumption, as compared to conventional architectures, all while providing a method to greatly improve data security systems.