Vectorized fault simulation on the Cray X-MP supercomputer
F. Özgüner, R. Daoud · 2003
A highly vectorized parallel fault simulation (VPFS) algorithm developed to take advantage of the specific hardware architecture of the Cray X-MP is described. The data structure is optimized to suit the constraints imposed by the design of the main memory on the Cray supercomputer. The implementation of VPFS on a Cray X-MP/24 achieved a peak performance of about 2.5*10/sup 9/ gate evaluations per second on one processor, for a maximal speedup of approximately=30 over scalar processing.>