A LAN system interface chip with selectable bus protocols
Doug Walters, Ping Lou, Otto N. Fanini, P. Koeppen · 1985
THE DESIGN OF A CHIP providing interface to a VLSI chip set implementing an IEEE802.5 compatible Local Area Network (LAN) adapter will be described. The chip set’ includes pairs of VLSI and MSI media interface chips. The attaching system bus can be microprocessor compatible, eight or sixteen bits wide, and either synchronous or asynchronous.