Efficient Interconnect Test Patterns and BIST Implementation for Crosstalk and Static Faults
Piljae Min, Pyoungwoo Min, Hyunbean Yi, Sungju Park · Journal of the Institute of Electronics Engineers of Korea · 2005
This paper presents effective test patterns and their BIST implementations for SoC and Board interconnects. Initially '6n'algorithm, where 'n' is the total number of interconnect nets, is introduced to completely detect and diagnose both static and crosstalk faults. Then, more economic 4n+1 algorithm is described to perfectly capture the crosstalk faults for the interconnect nets separated within a certain distance. It will be shown that both algorithms can be easily implemented as interconnect BIST hardwares with small area penalty than conventional LFSR.