High speed analog neuroprocessors for event tagging and data management
Raoul Tawel, Timothy X. Brown · AIP conference proceedings · 1993
We describe the electronic implementation of a custom analog CMOS VLSI neuroprocessor for pattern classification, based on a circuit that has been fabricated through MOSIS with 2 micron feature size geometry. This neuroprocessor has been demonstrated on the map separates problem for the real‐time extraction and color indexing of LANDSAT map features and topologically consists of 27 input units, 10 hidden units, and 8 output units, and is capable of over 109 operations per second.