The reconfigurable streaming vector processor (RSVP/spl trade/)
Silviu Ciricescu, R. Essick, B. Lucas, P. May, K. Moat, J. Norris, Michael A. Schuette, A. Saidi · 2003
The need to process multimedia data places large computational demands on portable/embedded devices. These multimedia functions share common characteristics: they are computationally intensive and data-streaming, performing the same operation(s) on many data elements. The reconfigurable streaming vector processor (RSVP) is a vector coprocessor architecture that accelerated streaming data operations. Programming the RSVP architecture involves describing the shape and location of vector steams in memory and describing computations as data-flow graphs. These descriptions are intuitive and independent of each other, making the RSVP architecture easy to program. They are also machine independent, allowing binary-compatible implementations with varying cost-performance tradeoffs. This paper presents the RSVP architecture and programming model, a programming case study, and our first implementation. Our results show significant speedups on streaming data functions. Speedups for kernels and applications range from 2 to over 20 times that of an ARM9 host processor alone.