Constructing Schedulers For High-Speed, High-Capacity Switches/Routers
Si Zheng, Mei Yang, Francesco B. Masetti · International Journal of Computers and Applications · 2003
The key to the design of CIOQ switches with space division multiplexing and grouped inputs/outpus (SDMG CIOQ switches for short) is a fast scheduling scheme resolving input and output contentions. Such a scheduling scheme is a typical application of the multi-requester, multi-server (MRMS) problem. To efficiently solve the MRMS problem and provide fair services to all requesters, we introduce programmable fc-selectors that can make k grants out of TV requests in O(logiV) time. We first show that the function of a programmable fc-selector can be reduced to a programmable prefix sums operation. Based on a simple prefix sums circuit, we propose three programmable prefix sums circuit designs. We further propose four different programmable fc-selector designs. Simulations on Synopsys's design_analyzer demonstrate that our designs achieve significant performance improvement over the design using programmable priority encoders. Due to their high performance, programmable_selectors are very useful for constructing schedulers for high-speed, high-capacity switches/routers, such as SDMG CIOQ switches and multi-server switches.