Analog decoding: state of the art
Christian B. Schlegel, Chris Winstead · 2005
Analog soft iterative error control decoders use analog computation to decode digital information. Analog soft-information processors offer the power of iterative decoding with a very small transistor count, enabling fully parallel decoding at low cost. They can be implemented in several technologies: BiCMOS and SiGe analog decoders are suitable for high-speed applications beyond 10 Gbit per second. CMOS analog decoders, by contrast, are best suited for low-cost, low-power applications with throughput up to 1 Gbit per second. CMOS analog decoders can also be designed for micropower operation, making them uniquely applicable to emerging applications such as sensor networks and implantable devices.