8Gb MLC (Multi-Level Cell) NAND flash memory using 63nm process technology
Jong‐Ho Park, Sung‐Hoi Hur, Joun-Hee Lee, Jin-Taek Park, Jongsun Sel, Jong‐Won Kim, Sang‐Bin Song, Jung‐Young Lee, Ji-Hwon Lee, Suk-Joon Son, Yong-Seok Kim, Min-Cheol Park, Sooin Chai, Jungdal Choi, U.-I. Chung, Joo-Tae Moon, Kycong-Tae Kim, Kinam Kim, B.-I. Ryu · 2005
For the first time, 8 Gb multi-level cell (MLC) NAND flash memory with 63 nm design rule is developed for mass storage applications. Its unit cell size is 0.0164 /spl mu/m/sup 2/, the smallest ever reported. ArF lithography with off-axis illumination (OAI) was employed for critical layers. In addition, self-aligned floating poly-silicon gate (SAP), tungsten gate with an optimized re-oxidation process, oxide spacer and tungsten bit-line (BL) with low resistance were implemented.