A sixteen level scheme enabling 64 Mbit flash memory using 16 Mbit technology
David L. Kencke, R. Richart, Shyam G. Garg, S. Banerjee · 2002
Multilevel flash memories have been shown to double storage capacity without changing device dimensions. In this work, it is demonstrated for the first time that sixteen levels can be stored within a small 2.5 V spread, quadrupling memory size with four bits/cell. A new method is used to calculate programmed threshold voltages, V/sub t/'s, showing that transistor V/sub t/'s may overlap while logical V/sub t/'s remain distinct. A ten-year equivalent data retention bake demonstrates the feasibility of this approach for producing 64 Mbit storage capacity using existing 16 Mbit NOR stacked-gate technology.