A VLSI architecture for fast and accurate floating-point sine/cosine evaluation
Vassilis Paliouras, H. Karagianni, Thanos Stouraitis · 2002
A VLSI architecture is presented, combining floating-point and simple fixed-point arithmetic. The algorithm implemented by the architecture is based on second-order polynomial interpolation. The exploitation of certain properties of the trigonometric functions and of specific bit patterns which appear in the involved computations, has led to a 40% memory size reduction and low overall hardware complexity. The time required to evaluate a sine is less than the time required for three single-precision floating-point MACs, while the computed sines and cosines are guaranteed to be accurate to half an ulp (unit in last position).