Quantum circuit design of 8 /spl times/ 8 discrete Hartley transform
Chien‐Cheng Tseng, Tsung-Ming Hwang · 2004
In this paper, the 8 /spl times/ 8 discrete Hartley transform will be implemented by using quantum elementary gates such as controlled NOT gates and Hadamard gates. Two steps involved are as follows: first, the discrete Hartley transform matrix is decomposed into the product of several sparse unitary matrices using the structure of fast Hartley transform algorithm. Then, each sparse matrix is implemented by elementary quantum gates and cascade them to obtain the final circuit. The design results show that the proposed design method has less circuit complexity than the conventional Cybenko's method.