Automated synthesis of asynchronous pipelines
Yau-Hwang Kuo, Shaw-Pyng Lo · 2003
Proposes a system for the automatic synthesis of asynchronous pipelines. A high-level hardware description language (HDL) called Masil-II is developed to describe the circuit behavior at algorithmic level. A modified Petri net is used as intermediate description. From the intermediate description, several techniques such as clique partitioning, simulated evolution, and heuristics are applied to realize the data path synthesis task. Experimental results have confirmed their efficiency.>