Fault masking in Quantum-dot cellular automata using prohibitive logic circuit
Rajdeep Kumar Nath, Bibhash Sen, Rachit Daga, Nilesh Chakraborty, Harsh Tibrewal, Biplab Kumar Sikdar · 2015
This work targets the challenges to design with uncertainty in QCA architecture via characterization of fabrication faults caused due to particular cell displacement in the QCA logic circuit. One of the worst kind of fault to remove is input generated transient fault, called single event upset (SEU). To show the unpredictability of QCA circuits under such faults, the correct input vectors are filtered beyond which the circuit behaves abnormally. The consequence of errors on the circuit is then analysed and test vector(s) is/are obtained to identify such faults. A prohibitive logic circuit is designed which allows just the right inputs and/or equivalent inputs to the faulty inputs. SEU transient fault can be avoided by the proposed prohibitive logic circuit to make an initiative towards the green computing.