A Hierarchical Test Generation Technique for Embedded Systems
Gert Jervan, Petru Eles, Zebo Peng · 2007
1 This paper presents a hierarchical test generation technique for embedded systems containing hardware and software. The technique is applied to the system-level specification of such systems. Different from the traditional approaches, hardware and software parts of an embedded system are handled in a uniform way. We will in particular show how the proposed technique can be applied at high levels of abstraction and how the software domain of the specification can also be successfully covered. 1. Introduction The development of hardware/software codesign techniques has made it possible to design hardware and software of an embedded system at the high levels of abstraction in a uniform way. However the testing of the hardware and software parts of the system are still considered as totally unrelated problems and solved with very different methods. In the early phases of the design cycle, system synthesis is performed starting from an implementation independent specification. Reasonin...