A programmable digital signal processor with 32b floating point arithmetic
Robert N. Kershaw, L.E. Bays, R. L. Freyman, J. Klinikowski, Carol Miller, Kalyan Mondal, Howard S. Moscovitz, W.A. Stocker, Luan C. Tran, W. Patrick Hays, James R. Boddie, E.M. Fields, C.J. Garen, JAMES TOW · 1985
A report on a programmable DSP with 32b floating point arithmetic, 32b data path, and an extensive 32b instruction set, implemented in 1.5μ NMOS technology, will be presented. The chip contains 155,000 transistors and operates at 16MHz.