An ultra high-speed FFT processor
Kai Zhong, Hui He, Guangxi Zhu · 2003
This paper presents an implementation of an ultra high-speed FFT processor which can process input data of 800MHz sample rate. In order to meet such an extremely real-time requirement, high-speed differential I/O interfaces (LVDS) and dedicated parallel-pipelined radix-8 architecture are adopted. Implemented in an FPGA device, the processor can operate at 115MHz and compute a 4096-point complex FFT in 5μs. To reduce power consumption, currently, the chip is being migrated to 0.18 μm CMOS technology.