Programmable Switch for Shared Bus Replacement
Tapani Ahonen, Jari Nurmi · 2006
A switching interconnection architecture with programmable priorities is described. The switch has been designed to replace shared buses in order to increase bandwidth in the local clusters of large systems-on-chip. The design features guaranteed service for the highest priority input port and best effort service for the rest. Suitable standard cell switch fabrics are discussed and their implementations compared. A memory space conserving programming model for the switch is presented together with a low latency arbiter design