CUPLAND-a behavioral level description compiler for designing of PLD/EPLD-based systems
Stanisław R. Deniziak, Krzysztof Sapiecha · 1994
High-level synthesis of PLD/EPLD-based systems is considered. Behavioral description of the system is formulated using procedural CHDL called UPLAND. The description is verified by simulation and tests are generated assuming a typical variable stuck-at fault model. Then, UPLAND source description is automatically translated into its corresponding target input format of a low logic level designing tool where target PLD/EPLD devices are optional. Finally, a fast state encoding optimization procedure is applied so that the nearly minimal PLD/EPLD-based implementation of the input format is obtained.>