Reconfigurable real-time address trace compressor for embedded microprocessors
Shyh-Ming Huang, Ing-Jer Huang, Chung-Fu Kao · 2004
Address trace compression represents that the address data, which were generated from instruction fetch stage of microprocessor, can be retrieved for later observation and analysis. In this paper, we present how to design and implement this real-time address trace compressor (RTATC), which can be used to collect the address trace information of FPGA Prototyping system based on embedded microprocessors. Address trace compressor is able to monitor address bus of microprocessor, and to get operation workload under the analysis of profiling software. Address trace compressor is also allowed to perform accurate, successive trace collection in an unlimited length and can be used in different embedded microprocessors. At last, by the help of FPGA, this silicon intelligent property can own the abundant reconfigurable parameters, the removable modules and the reusable ability.