Specification, Synthesis and Validation of Hardware/Software Interfaces
Mattias O’Nils · KTH Publication Database DiVA (KTH Royal Institute of Technology) · 1999
Design based on intellectual property (IP) is emerging to close the gap between steadily increasing capacity, in terms of transistors on integrated devices, and design productivity, in terms of the number of transistors designed in a given period. However, the integration of several IP blocks into a single system on one chip makes the specification and implementation of interfaces (for example, bus interfaces and device drivers) a dominant design problem for embedded systems. There is therefore a need for effective ways of modelling, refining, and implementing communication within embedded systems. This thesis presents one approach to hardware/software interface synthesis that ranges from the specification to the implementation and validation of hardware/software interface protocols. The information required for hardware/software interface synthesis is separated into three parts: the protocol specification, information related to the operating system, and information related to the processor. From these inputs a synthesis tool generates (a) device driver functions, (b) a combination of device driver functions and a DMA controller, or (c) simulation models, depending on what the designer decides. The clean separation of information facilitates (1) efficient design space exploration with combinations of different processors, operating systems and protocols, and (2) efficient maintenance of a large number of different versions and variants of hardware/software interfaces. The three-phase validation approach is based on standard simulation methods and facilitates simulation of the interfaces at several steps during development. We keep all the simulation models consistent with both the specification and the implementation by generating the models using the same technique that is used for synthesis. Validation in several phases is justified (1) by the faster simulation of early phases (up to four times faster than late phases), and (2) by allowing both hardware designers and software developers to work in their familiar tool environments as long as possible. Protocols are specified as a grammar, which is fully independent of architecture and implementation. After the initial selection of implementation alternatives, the methods presented are fully automated. Using real-life examples we demonstrate the effectiveness of the simulation models and show that the quality of the generated code is close to handwritten quality in terms of performance, area and code size.