XCS applied to mapping FPGA architectures
Martin Daněk, Robert E. Smith · 2002
This paper considers the application of XCS to the complex, real-world problem of mapping Boolean networks to technology-specific layout of field programmable gate arrays (FPGAs). The mapping is formulated as a temporal task, where the XCS’s actions are to create blocks (based on an abstract Boolean network) that can be placed in the FPGA, one-at-a-time. Despite the complexity of this task, we demonstrate that the system is effective. We demonstrate the transfer of knowledge stored in an XCS rule set from a small FPGA mapping problem, to a larger problem. We present a novel technique that utilizes a problem-specific finite state machine and two populations of classifiers to treat the problem hierarchically. Final sections of the paper discuss implications and future directions for this work. 1