Design and implementation of the data-path of a 32-bit RISC microprocessor:HRISCII
Y.I. El-haffaf, A. Bouaraoua, A. Amari · 2003
Describes the design and the implementation of the data-path of a 32-bit RISC microprocessor called HRISCII. This unit was designed to operate with a 20 MHz clock rate, has been implemented in a 2 micron, two layers metal, one polysilicon CMOS process. It contains about 16 000 transistors and occupies an area of 20 mm/sup 2/.>